170
ATmega8515(L)
2512A–AVR–04/02
Setting the Boot Loader Lock
Bits by SPM
To set the Boot LoaderLock bits, write the desireddatatoR0,write “X0001001” to
SPMCRand execute SPMwithin fourclock cycles afterwriting SPMCR. Theonly
accessible Lock bits arethe Boot Lock bits that mayprevent theApplication andBoot
Loadersection from anysoftwareupdate by the MCU.
See Table 74and Table 75 forhow the different settings of the Boot Loaderbits affect
the Flash access.
If bits 5..2 in R0 are cleared(zero), the corresponding Boot Lock bit will be programmed
if an SPM instruction is executedwithin four cycles afterBLBSETandSPMEN are set in
SPMCR. The Z-pointer isdon’t care during this operation,but forfuture compatibility it is
recommended to load the Z-pointerwith$0001 (same as usedforreading the Lock
bits). Forfuture compatibilityItis also recommended to set bits7,6,1, and 0inR0to“1”
when writing the Lock bits. When programming the Lock bits the entire Flash can be
readduring theoperation.
EEPROM Write Prevents
WritingtoSPMCR
Note that an EEPROM write operation will block all software programming to Flash.
Reading the Fuses andLock bitsfrom software will also be preventedduring the
EEPROM write operation. Itisrecommended that theuserchecks the statusbit (EEWE)
in the EECRRegister and verifies that the bit isclearedbefore writing to the SPMCR
Register.
Reading the Fuse and Lock
Bits from Software
Itispossibletoreadboth the FuseandLock bitsfrom software. To read the Lock bits,
load the Z-pointerwith$0001 andset the BLBSETandSPMEN bits in SPMCR. When
an LPM instruction is executedwithin three CPU cycles after the BLBSETandSPMEN
bits are set in SPMCR, thevalue of the Lock bitswill be loaded in the destination regis-
ter.The BLBSETandSPMEN bitswill auto-clear upon completion ofreading the Lock
bits or if no LPM instruction is executedwithin three CPU cycles or no SPM instruction is
executedwithin fourCPUcycles. When BLBSETandSPMEN are cleared, LPMwill
work asdescribed in the Instruction set Manual.
Thealgorithm forreading the Fuse Lowbits issimilar to theonedescribed above for
reading the Lock bits.Toread the Fuse Lowbits, load the Z-pointerwith$0000 andset
the BLBSETandSPMEN bits in SPMCR. When an LPM instruction is executedwithin
three cycles after the BLBSETandSPMEN bits are set in the SPMCR, thevalue of the
Fuse Lowbits(FLB)will be loaded in the destination register asshown below.Refer to
Table84onpage 177 for a detaileddescription and mapping of the Fuse Lowbits.
Similarly, when reading the Fuse Highbits, load$0003 in the Z-pointer. When an LPM
instruction is executedwithin three cycles after the BLBSETandSPMEN bits are set in
the SPMCR, thevalue of the Fuse Highbits(FHB)will be loaded in the destination reg-
ister asshown below.Refer to Table83 on page 176 fordetaileddescription and
mapping of the Fuse Highbits.
FuseandLock bits that are programmed, will be read aszero. FuseandLock bits that
areunprogrammed, will be read as one.
Bit 76543 210
R0 1 1 BLB12 BLB11 BLB02 BLB01 1 1
Bit 76543 210
Rd – – BLB12 BLB11 BLB02 BLB01 LB2 LB1
Bit 76543 210
Rd FLB7 FLB6 FLB5 FLB4 FLB3 FLB2 FLB1 FLB0
Bit 76543 210
Rd FHB7 FHB6 FHB5 FHB4 FHB3 FHB2 FHB1 FHB0
(151 pagine)
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