Rainbow-electronics ATtiny43U Manuale Utente Scaricare il pdf (Pagina 130)

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8048B–AVR–03/09

ATtiny43U

16.13.5 DIDR0 – Digital Input Disable Register 0

• Bits 3:0 – ADC[3:0]D: ADC[3:0] Digital Input Disable

When this bit is written logic one, the digital input buffer on the corresponding ADC pin is dis-

abled. The corresponding PIN register bit will always read as zero when this bit is set. When an

analog signal is applied to the ADC[3:0] pin and the digital input from this pin is not needed, this

bit should be written logic one to reduce power consumption in the digital input buffer.

1 0 1 Timer/Counter1 Compare Match A

1 1 0 Timer/Counter1 Overflow

1 1 1 Timer/Counter1 Compare Match B

Table 16-6. ADC Auto Trigger Source Selections (Continued)

ADTS2 ADTS1 ADTS0 Trigger Source

Bit 76543210

0x01 (0x21) ––

AIN1D AIN0D ADC3D ADC2D ADC1D ADC0D DIDR0

Read/Write R R R/W R/W R/W R/W R/W R/W

Initial Value 0 0 0 0 0 0 0 0

1 2 ... 125 126 127 128 129 130 131 132 133 134 135 ... 181 182

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