Rainbow-electronics AT89C5122 Manuale Utente Scaricare il pdf (Pagina 178)

178

AT8xC5122/23

4202E–SCR–06/06

Reset Value = XXXX X000b

The three lower bits (S0, S1, S2) located into WDTPRG register enables to program the

WDT duration.

To compute WD Timeout, the following formula must be applied:

Time Out = 6 * (2

* 2

Svalue

- 1 ) / F

CK_WD

Note: Svalue represents the decimal value of (S2 S1 S0)

Table 109. Watchdog Timer Out Register - WDTPRG (0A7h)

76543210

-----S2S1S0

Bit

Number

Bit

Mnemonic Description

7 - 3 -

Reserved

The value read from this bit is indeterminate. Do not change these bits.

2 S2 WDT Time-out select bit 2

1 S1 WDT Time-out select bit 1

0 S0 WDT Time-out select bit 0

Table 110. Machine Cycle Count

S2 S1 S0 Machine Cycle Count

000 2

- 1

001 2

- 1

010 2

- 1

011 2

- 1

100 2

- 1

101 2

- 1

110 2

- 1

111 2

- 1

1 2 ... 173 174 175 176 177 178 179 180 181 182 183 ... 212 213

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