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1.0 Functional Description (Continued)
Register flags are updated at the completion of a conversion,
which occurs approximately 60 ms after a temperature diode
is sampled. INT is deactivated when the Status Register,
containing the set bit, is read and a temperature reading is
less than or equal to it’s corresponding HIGH setpoint, as
shown in
Figure 4
.
Figure 5
shows a simplified logic diagram
for the INT output and related circuitry.
The INT output can be disabled by setting the INT mask bit,
D7, of the configuration register. INT can be programmed to
be active high or low by the state of the INT inversion bit, D1,
in the configuration register. A “0” would program INT to be
active low. INT is an open-drain output.
1.3 T_CRIT_A OUTPUT and T_CRIT LIMIT
T_CRIT_A is activated when any temperature reading is
greater than the limit preset in the critical temperature set-
point register (T_CRIT), as shown in
Figure 6
. The Status
Registers can be read to determine which event caused the
alarm. A bit in the Status Registers is set high to indicate
which temperature reading exceeded the T_CRIT setpoint
temperature and caused the alarm, see
Section 2.3
.
Local and remote temperature diodes are sampled in se-
quence by the A/D converter. The T_CRIT_A output and the
Status Register flags are updated at the completion of a con-
version. T_CRIT_A and the Status Register flags are reset
only after the Status Register is read and if a temperature
conversion is below the T_CRIT setpoint, as shown in
Figure
6
.
Figure 7
shows a simplified logic diagram of the
T_CRIT_A and related circuitry.
Located in the Configuration Register are the mask bits for
each temperature reading, see
Section 2.5
. When a mask bit
is set, its corresponding status flag will not propagate to the
T_CRIT_A output, but will still be set in the Status Registers.
Setting all four mask bits or programming the T_CRIT set-
point to 127˚C will disable the T_CRIT_A output.
1.4 POWER ON RESET DEFAULT STATES
LM83 always powers up to these known default states:
1. Command Register set to 00h
2. Local Temperature set to 0˚C
DS101058-14
*
Note: Status Register Bits are reset by a read of Status Register where
bit is located.
FIGURE 4. INT Temperature Response Diagram with
D2RHS and D3RHS set to 127˚C.
DS101058-21
FIGURE 5. INT output related circuitry logic diagram
DS101058-6
*
Note: Status Register Bits are reset by a read of Status Register where
bit is located.
FIGURE 6. T_CRIT_A Temperature Response Diagram
with remote diode 1 and local temperature masked.
DS101058-20
FIGURE 7. T_CRIT_A output related circuitry logic
diagram
LM83
www.national.com9
- General Description 1
- Features 1
- Key Specifications 1
- Applications 1
- Simplified Block Diagram 1
- Typical Application 2
- Pin Description 2
- Pin Description (Continued) 3
- Operating Ratings 4
- DS101058-4 6
- Figure 3 7
- 1.0 Functional Description 8
- DS101058-14 9
- DS101058-21 9
- DS101058-6 9
- DS101058-20 9
- Sections 1.2 and 1.3 11
- 3.0 SMBus Timing Diagrams 16
- Figure 9 17
- Figure 10 17
- 4.0 Typical Applications 18
- (Continued) 19
- 16-Lead QSOP Package 20
- NS Package Number MQA16 20
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