Rainbow-electronics ATmega8HVD Manuale Utente Scaricare il pdf (Pagina 26)

8052B–AVR–09/08

ATmega4HVD/8HVD

Interrupts must be disabled when changing prescaler setting to make sure the write procedure

is not interrupted.

8.11 ADC Clock Prescaler

The ADC clock will be automatically prescaled relative to the System Clock Prescaler settings,

see ”System Clock Prescaler” on page 25. Depending on the Clock Prescale Select bits,

CLKPS1..0, the ADC clock, clk

ADC

, will be prescaled by 24, 12 or 6 as shown in Table 8-3 on

page 26.

Note: 1. When changing Prescaler value, the ADC Prescaler will automatically change frequency of

the ADC. The result of the ongoing conversion will be invalid.

Table 8-3. ADC Clock Prescaling

(1)

CLKPS1 CLKPS0 ADC Division Factor

00Reserved

0124

1012

116

1 2 ... 21 22 23 24 25 26 27 28 29 30 31 ... 167 168

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