Rainbow-electronics AT89LS53 Manuale Utente

AT89LS534-249Features•Compatible with MCS-51™ Products•12K Bytes of In-System Reprogrammable Downloadable Flash Memory- SPI Serial Interface for Progr

AT89LS534-258Timer 0 and 1Timer 0 and Timer 1 in the AT89LS53 operate the sameway as Timer 0 and Timer 1 in the AT89C51, AT89C52 andAT89C55. For furth

AT89LS534-259Figure 2 shows Timer 2 automatically counting up whenDCEN = 0. In this mode, two options are selected by bitEXEN2 in T2CON. If EXEN2 = 0,

AT89LS534-260Figure 3. Timer 2 Auto Reload Mode (DCEN = 1)Figure 4. Timer 2 in Baud Rate Generator ModeOSCSMOD1RCLKTCLKRxCLOCKTxCLOCKT2EX PINT2 PINT

AT89LS534-261Baud Rate GeneratorTimer 2 is selected as the baud rate generator by settingTCLK and/or RCLK in T2CON (Table 2). Note that the baudrates

AT89LS534-262Programmable Clock OutA 50% duty cycle clock can be programmed to come out onP1.0, as shown in Figure 5. This pin, besides being a regu-l

AT89LS534-263The interconnection between master and slave CPUs withSPI is shown in the following figure. The SCK pin is theclock output in the master

AT89LS534-264InterruptsThe AT89LS53 has a total of six interrupt vectors: twoexternal interrupts (INT0 and INT1), three timer interrupts(Timers 0, 1,

AT89LS534-265Oscillator Characteristics XTAL1 and XTAL2 are the input and output, respectively,of an inverting amplifier that can be configured for us

AT89LS534-266Program Memory Lock BitsThe AT89LS53 has three lock bits that can be left unpro-grammed (U) or can be programmed (P) to obtain the addi-t

AT89LS534-2677. To verify the byte just programmed, bring pin P2.7 to “L” and read the programmed data at pins P0.0 to P0.7.8. Repeat steps 3 through

AT89LS534-250Pin DescriptionVCCSupply voltage.GNDGround.Port 0Port 0 is an 8-bit open drain bidirectional I/O port. As anoutput port, each pin can sin

AT89LS534-268Instruction SetNotes: 1. DATA polling is used to indicate the end of a write cycle which typically takes less than 10 ms at 2.7V.2. “x” =

AT89LS534-269Flash Parallel Programming ModesNotes: 1. “h” = weakly pulled “High” internally.2. Chip Erase and Serial Programming Fuse require a 10-ms

AT89LS534-270Figure 13. Programming the Flash MemoryFigure 14. Flash Serial Downloading+Figure 15. Verifying the Flash Memory

AT89LS534-271Flash Programming and Verification Characteristics - Parallel ModeTA = 0°C to 70°C, VCC = 5.0V ± 10%Symbol Parameter Min Max UnitsVPPProg

AT89LS534-272Flash Programming and Verification Waveforms - Parallel ModeSerial Downloading WaveformsSERIAL CLOCK INPUTSERIAL DATA INPUTSCK/P1.7MOSI/P

AT89LS534-273Absolute Maximum Ratings*Operating Temperature...-55°C to +125°C*NOTICE: Stresses beyond those listed under “Absolute

AT89LS534-274AC Characteristics Under operating conditions, load capacitance for Port 0, ALE/PROG, and PSEN = 100 pF; load capacitance for all otherou

AT89LS534-275External Program Memory Read CycleExternal Data Memory Read Cycle

AT89LS534-276External Data Memory Write CycleExternal Clock Drive WaveformsExternal Clock DriveSymbol ParameterVCC = 2.7V to 6.0VMin Max Units1/tCLCLO

AT89LS534-277Serial Port Timing: Shift Register Mode Test ConditionsThe values in this table are valid for VCC = 2.7V to 6V and Load Capacitance = 80

AT89LS534-251Block DiagramPORT 2 DRIVERSPORT 2LATCHP2.0 - P2.7FLASHPORT 0LATCHRAMPROGRAMADDRESSREGISTERBUFFERPCINCREMENTERPROGRAMCOUNTERDPTRINSTRUCTIO

AT89LS534-278AT89LS53TYPICAL ICC (IDLE) at 25°C0.00.81.62.43.24.04.804 8 12 16 20 24F (MHz)V=CCV=CC6.0V5.0VICCmAV=CC3.0VAT89LS53TYPICAL ICC (ACTIVE) a

AT89LS534-279Ordering InformationSpeed(MHz)PowerSupplyOrdering Code Package Operation Range12 2.7V to 6.0V AT89LS53-12ACAT89LS53-12JCAT89LS53-12PC44A4

AT89LS534-252Pin DescriptionFurthermore, P1.4, P1.5, P1.6, and P1.7 can be configuredas the SPI slave port select, data input/output and shiftclock in

AT89LS534-253XTAL1Input to the inverting oscillator amplifier and input to theinternal clock operating circuit. XTAL2Output from the inverting oscilla

AT89LS534-254User software should not write 1s to these unlisted loca-tions, since they may be used in future products to invokenew features. In that

AT89LS534-255Dual Data Pointer Registers To facilitate accessing exter-nal data memory, two banks of 16 bit Data Pointer Regis-ters are provided: DP0

AT89LS534-256Table 4. SPCR—SPI Control RegisterSPCR Address = D5H Reset Value = 0000 01XXBSPIE SPE DORD MSTR CPOL CPHA SPR1 SPR0Bit76543210Symbol Func

AT89LS534-257Data Memory - RAMThe AT89LS53 implements 256 bytes of RAM. The upper128 bytes of RAM occupy a parallel space to the SpecialFunction Regis